| Filename |
Description |
Date |
Size |
|
B1S_v21slr.zip |
BrillianX IS BIOS version
2.1 for LogoEasy, SpeedEasy and SecurityEasy
(support both PCB v1.0 and PCB v2.0 mainboards)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
1. Support large HDD.
2. Support EDO DRAM.
3. Updated new micro-code.
4. Updated some DMI information.
5.Resolved the abnormal shut down© problem under
Win98SE, When set the "Wake On LAN" as enabled
in CMOS. |
11-30-99 |
229081 |
|
|
|
|
|
B1S_v20slr.zip |
BrillianX IS BIOS version
2.0 for LogoEasy, SpeedEasy and SecurityEasy
(support both PCB v1.0 and PCB v2.0 mainboards)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
1. Passed HCT8.0 test.
2. Updated SMBIOS to v2.3.
3. Updated QDM interface to v2.0.
4. Updated micro code to support P-III 600MHz CPU.
5. Resolved the resume by ring fail problem.
6. Resolved the boot from LAN fail problem.
7. Resolved the CPU speed display error. |
08-05-99 |
228021 |
| |
|
|
|
|
B1S_v17slr.zip |
BrillianX IS BIOS version
1.7 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
Resolved the Boot from LAN's problem. |
07-30-99 |
222592 |
| |
|
|
|
|
B1S_v16slr.zip |
BrillianX IS BIOS version
1.6 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
1. Supports P-III 550 CPU.
2. Detect the ATA66 HDD correctly.
3. Modified the default value of "spread spectrum"
to "disabled".
4. Resolved the video off method to "DPMS".
5. Supports ZIP driver by jumper.
6. Changed the position of SpeedEasy and Chipset item
in BIOS setup.
7. Deleted the –5V item in system monitor.
8. Supports SST39020 flash ROM.
9. Added NCR400.BIN in system BIOS.
10. Resolved the CPU fan halt problem under ACPI.
11. Resolved the QDI logo display problem when booting. |
06-02-99 |
223494 |
| |
|
|
|
|
B1S_v14slr.zip |
BrillianX IS BIOS version
1.4 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
Set the Hard Disk of Ultra DMA 66 Mode 4 as Mode 2. |
04-11-99 |
202209 |
| |
|
|
|
|
B1S_v13slr.zip |
BrillianX IS BIOS version
1.3 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
1. Resolved the CPU detected problem in SpeedEasy option
of Bios Setup.
2. Disable the "processor Number Feature" to
support P-III CPU in Bios Feature Setup. |
02-10-99 |
202097 |
| |
|
|
|
|
B1S_v12slr.zip |
BrillianX IS BIOS version
1.2 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
1. Resolved the FSB display error.
2. Support Celeron CPU upto 500MHz.
3. Support P-III (Katmei) CPU. |
01-25-99 |
202702 |
| |
|
|
|
|
B1S_v11slr.zip |
BrillianX IS BIOS version
1.1 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for BrillianX IS mainboard only,
not for BrillianX I and BrillianX 1S/2000 mainboards)
Bios Modified:
1. If the wrong SPD data has been detected, this Bios
will auto config the memory instead of using the wrong
SPD data.
2. Support IrDA.
3. Fixed the Mendocino 333MHz CPU display as "333A"
problem.
4. Support 100MHz Bus Speed with WINBOND clock chip. |
12-09-98 |
198369 |
| |
|
|
|
|
B1S_v10slr.zip |
BrillianX IS BIOS version
1.0 for LogoEasy, SpeedEasy and SecurityEasy
(support PCB v1.0 mainboard only)
(for Brillian
X IS mainboard only, not
for BrillianX I and BrillianX 1S/2000 mainboards) |
09-11-98 |
200704 |
| |
|
|
|
|
|
|
|
